? semiconductor components industries, llc, 2012 august, 2012 ? rev. 0 1 publication order number: p3p8203a/d p3p8203a general purpose peak emi reduction device functional description p3p8203a is a versatile, 3.3 v lvcmos peak emi reduction device. p3p8203a accepts an input clock either from a fundamental crystal or from an external reference and locks on to it delivering a 1x modulated clock . p3p8203a has an ssextr pin to select different deviations depending upon the value of an external resistor connected between ssextr and gnd. p3p8203a operates with 3.3 v 0.3 v supply and is available in an 8 pin , wdfn (2 mm x 2 mm) package, over a temperature range of 0 c to +70 c. features ? 1x, lvcmos peak emi reduction ? supports non-continuous input clock applications ? input / output frequency range: 18 mhz ? 36 mhz ? analog deviation selection ? supply voltage: 3.3 v 0.3 v ? 8 pin, wdfn (2 mm x 2 mm) package ? operating temperature range: 0 c to +70 c ? these devices are pb ? free, halogen free/bfr free and are rohs compliant application ? p3p8203a is targeted for use in a broad range of note book and desktop pcs and consumer electronic applications. vdd gnd digital frequency modulation analog deviation control ssextr modout xin/clkin xout crystal oscillator figure 1. block diagram wdfn8 case 511aq marking diagram http://onsemi.com 1 gj = specific device code m = date code = pb ? free device gj m 1 1 2 3 4 8 7 6 5 xin/clkin xout nc gnd ssextr nc modout pin configuration see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information v dd (*note: microdot may be in either location)
p3p8203a http://onsemi.com 2 table 1. pin description pin # pin name type description 1 xin/clkin input crystal connection or external reference clock input. 2 xout output crystal connection. if using an external reference, this pin should be left open. 3 nc no connection 4 gnd power ground 5 modout output buffered modulated clock output. 6 nc no connection 7 ssextr input analog deviation selection through external resistor to gnd. 8 vdd power supply voltage table 2. operating conditions symbol description min max unit v dd supply voltage 3.0 3.6 v t a operating temperature (ambient temperature) 0 70 c c l load capacitance 15 pf c in input capacitance 7 pf table 3. absolute maximum rating symbol description rating unit v dd, v in voltage on any input pin with respect to ground ? 0.5 to +4.6 v t stg storage temperature ? 65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22 ? a114 ? b) 2 kv stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. table 4. electrical characteristics symbol parameter test conditions min typ max unit v dd supply voltage 3.0 3.3 3.6 v v il input low voltage 0.35 * v dd v v ih input high voltage 0.65 * v dd v v ol output low voltage i ol = 8 ma 0.25 * v dd v v oh output high voltage i oh = -8 ma 0.75 * v dd v i cc static supply current clkin pulled low 1 ma i dd dynamic supply current unloaded output 18 mhz 5 ma 24 mhz 6 36 mhz 8 c l load capacitance 15 pf z 0 output impedance 24
p3p8203a http://onsemi.com 3 table 5. switching characteristics parameter test conditions min typ max unit input clock frequency 18 36 mhz modout 18 36 output rise time (notes 1 and 2) measured between 20% to 80% 1.0 1.6 ns output fall time (notes 1 and 2) measured between 80% to 20% 1.0 1.6 ns output duty cycle (notes 1 and 2) measured at 50% (with input duty cycle of 50%) 45 50 55 % cycle-to-cycle jitter (note 2) unloaded output with ssextr pin open 100 ps part-part frequency deviation variation 20 % 1. all parameters are measured with 15pf load on modout. 2. parameter is guaranteed by design and characterization. not tested in production.
p3p8203a http://onsemi.com 4 switching waveforms t 3 output t 4 20% 80% 20% 80% figure 2. output rise/fall time t 2 t 1 50% 50% output figure 3. duty cycle timing rx c l crystal r figure 4. typical crystal interface circuit c l c l = 2*(c p ? c s ), where c p = load capacitance of crystal specified in a crystal datasheet c s = stray capacitance due to cin, pcb, trace etc c l =load capacitance to be used rx is used to reduce power dissipation in the crystal
p3p8203a http://onsemi.com 5 0.030 0.035 0.040 0.045 0.050 0.055 0.060 5 5.5 6 6.5 7 figure 5. deviation vs. ssextr (@ 27 mhz) (note: parameter is guaranteed by design and characterization. not tested in production.) resistance (k ) deviation ( %) figure 6. typical application circuit rs = trace impedance of pcb ? output impedance of device (z0) analog d eviation c ontrol xin/c lkin xout 1 2 4 8 gnd vdd c2 modout modout cloc k p3p8203a 3, 6 r rs c1 vddin nc ssextr 7 y1 5 r1 note: refer pin description table for functionality details c l is the load capacitance for proper xtal operation c l c l 2.2 f 0.1 f ordering information ordering code marking temperature package type shipping ? P3P8203AMTTBG gj 0 c to +70 c 8 ? pin (2 mm x 2 mm) wdfn (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *a ?microdot? placed at the end of last row of marking or just below the last row toward the center of package indicates pb ? free.
p3p8203a http://onsemi.com 6 package dimensions wdfn8 2x2, 0.5p case 511aq issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal. c a seating plane d e 0.10 c a3 a a1 0.10 c dim a min millimeters 0.70 a1 0.00 a3 0.20 ref b 0.20 d 2.00 bsc e 2.00 bsc e 0.50 bsc pin one reference 0.05 c 0.05 c 8x a 0.10 c note 3 l e b b 4 5 8x 1 8 0.05 c 0.50 l *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.30 0.50 0.78 7x dimensions: millimeters bottom view 0.35 pitch 8x 0.80 0.05 0.30 0.60 max l1 detail a l optional constructions l --- l1 0.15 b top view side view e/2 1 package outline detail b detail a 2x 2x 8x recommended 0.88 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 p3p8203a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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